Making the 1541 faster

Accelerated Data Interchange Open System
(It's called an open system because the drive case is open often.:-)

A project to speed up The commodore 1541 floppy disk drive.

Consist of :
1. Hardware modifications
2. Cute executive software
3. Applications

1. I haven't made any schematics for the connections!
The address decoding logic is now in one PAL16L8 programmed logic chip. Here is the logic equations file in SPRINT-programmer format. The two ROMs are replaced by one 32 Kbyte Flash PEROM (Type Atmel AT 29C256). The RAM is now 32 kilobytes (type 62256 SRAM) instead of 2 K (6116). $8000-$ffff is flash, the rest RAM, except $1000-$1fff where 2 VIAs and at $1000 an extra 65SC22 VIA are mapped. VIA pins are used to select a page at $1200 from 256 KByte memorybank (two 628128 SRAMs). Real-time GCR-decoder. It will take 5 GCR bytes and output 4 binary bytes. The GCR-decoder consist of data-flipflops(74hct574) and an EPROM that has the GCR to BIN array. The board is mapped to $1400. There was a parallel 8 bit connection to the C64 user port at the otherwise unused $1800 VIA port. Data transfers were very fast using this byte wide bus. There was a switch that enabled programs be downloaded to the 1541 via the parallel lines. I'm going to use the normal commodore serial bus for downloading in to the flash.

2. There were Fast I/O-routines for the parallel cable. I have planned to modify the disk-routines to use the GCR-decoder and the 256KB buffer.

3. Cache(First version cached two tracks and the directory track to the 32KB RAM), Load accelerator(Didn't work perfectly), Disk copier(haven't done this yet. Disks could be copied without them being transferred to the C64)

fgd.gif An unfinished version of the Fast GCR Decoder. Using pulses from 4017 type counter shouldn't work here really, if it's outputs are decoded so that they have glitches.