Here will be something about RAM expansion boards
that go to Amiga's 68000 dip-socket
-No support (yet) for read-modify-write cycles of ram nor 68000. (used for tas instruction, maybe not used normally in amiga)
-Stackable with other boards, if no space conflict. V6x,V5x have smaller "footprint" than v4x.
-Only either config in or out in v5x, selectable by programming cpld.
CPLD source code and jedec files
Updates, bug fixes (there have been bugs)
Autoconfig chainEach autoconfig device gets it's own base address set up by Kickstart. Zorro 2 bus cards appear, each one at it's own turn, when the card's config-in is active low, at $E8xxxx address for the CPU to read board info,and setting board base address (or shutting up the card), whereby it also disappears from $E8xxxx and sets config-out active low, which connects to config-in input at next card in chain.The last card's config out, the last in chain, would be unconnected to anything.
However, CPU cards can config on-board autoconfig resources first internally, without reading or writing $E8xxxx on other cards in the system, therefore the processor card can allow the first external autoconfig card have it's config-in low all the time. A CPU card can be at 68000 socket, also at 86-pin slot (Amiga 2000), or card edge (500/1000).
CDTV has it's DMAC chip config-in low. And actually config-out is shorted to ground too, making not possible to use the usual config chain. I think that The DMAC chip will try to drive config-out high, against ground for a brief moment at each reset reboot.
To prevent two devices driving cpu bus at the same time, card should respond to $e8xxxx on it's own turn. Also, after succesful autoconfig is done, the base-address selects only one card at the time. In Amiga 2000, if two or more Zorro 2 cards would think at the same time that they are selected (autoconfig not worked properly), this would be prevented by bus control hardware and bus error condition would be set.
Autoconfig 68000 socket ram board- Autoconfig signal wire connections are not needed if ram board is the either only autoconfig device in system or other cards config first without accessing e80000 area on 68000 socket.
So then, Autoconfig-in signal should be "tied" (or jumpered) to low level (gnd) to enable ram autoconfig. (See board versions)
- But in CDTV, the DMAC chip is another autoconfig device. Use newer cpld code "force config after one other(the dmac)" and put high level (inactive) to config-in to prevent config first and conflicting with DMAC.
- Amiga 500's 86-position side slot edge connector has autoconfig-out contact at bottom side, which is connected to ground on top side by pcb via. Maybe this grounding could be cut by drilling a little from top, and the permanent grounding could be replaced with pull-down resistor 4k7? Config-out from internal RAM-card could then be connected there to allow external "sidecar" expansion to autoconfig on turn.
Side edge contact 11 is "config-in", and in A500 this contact finger is unconnected. A config-out signal (supposedly) coming from the A590 hard drive/memory expansion at this contact could be lead to the ram board's config-in. Not in a loop, but only either config-out or config-in is connected to card-edge, in a chain. In order to enable the RAM card when the a590 is removed, it's config-in should be pulled low normally by resistor (Supposing A590 pulls it's config out high when it's autoconfig is not yet performed.)
- When using config-in belonging to last Amiga 2000 Zorro-slot, the slot should be left *empty*.
Amiga 2000 (at least on rev4.4 B2000 mainboard), config-in of last zorro slot can be also found at pin 8 of 74LS32 (U606)
and pcb via where wire can be soldered
Various styles sockets or pins could be found for 68000 connection (pictures of some at ide 68k page)
(left picture) Testing socket to see if has a grip and therefore should make a connection.
(on the right) Socket has come a part, part of it was stuck to 68000 pin when removing the cpu.
Possible source for socket/pin parts: link
V67 shows jtag signal names on bottom side.Solder shorts on bottom for omitting part "buf4" on top.
Unlike in picture above, the SMD jumper should be in "HI", when about 4.7 kohm R2 is used, (R2 as pull-up to +3v3), because the led and it's 1kohm series resistor to +3v3 would pull config-in to an invalid mid range voltage, if R2 were configured "LO" to gnd. To activate config-in, low-impedance connection to low level (gnd short, jumper, other card's config-out output) would be used.
Without using "BUF4" and without pin header for config-signals, put solder bridge between "gnd" and "config-in" pads. With the pin header, you can use a jumper block.
Shown soldered are 0603 100nF capacitors. To other 0603 positions can be e.g. 2.2 uF capacitors soldered.
If polarised tantalum capacitors in positions C3V3, C5V (2.2uF min.) and C9 are used, note the marked "+" ends on them. Do not put them the wrong way to avoid burning/exploding.
Ceramic min. 2.2uF (0805-1210 size) could be used instead, maybe lower profile than tantalums.
Brown resistors are (about) 1 kohm, and
the LED "+" ends are connected right to these resistors.
LEDs could be omitted for easier building, but are useful for debugging config-in/config-out status.
1206 ferrite beads for +5v supplies from dip-64 could be replaced with 0-ohm 1206 jumpers.
V61, 62, 64, 65, 66, 67, 68
-Some boards made to thin 0.6 or 0.8mm thickness, some boards with very large dip-64 drill holes: features to help piggy-back soldering the ram board to a dip-64 ide-interface board.
-text like DR1.4, DR1.5, DR2.0... on board should tell which drill size was used for dip-64 on the board (1.4mm, 1.5mm, 2.0mm or so on...)
-if pull-down resistor on config-in, override by connecting to adjacent config-out, both will thus remain high (disabling ram), or with CDTV cpld code version go low after one other card's config seen at $e8xxxx.
-Make connection to ground in order to override a pull-up.
-A weak pull-up/down (few hundred kilo-ohms) that is buffered with ic in some boards, can be overriden with a few kilo-ohm resistor.
-cpld is xc9572xl in vqfp-64 package (part numbers and speed grades etc. can vary)
-AP2210N-3.3 volt sot-23 regulator, input and output capacitors 2.2uF min., footprint 1210/tantalum B-case max. Voltage 6.3v min for 3.3volt out, min. 10 volts for input.
-bypass capacitors 0603 size, e.g. 100nF. Can use two values E.g. in V67 C1-C4 10..100nF, C5-C8 2.2uF by the RAM chip.
-5 volt dram (used KM416C4100AS, also maybe KM416C4104, suffixes for both can be AS,BS, and so on).
-4-position header/pads: config pins 2 at center, 2 grounds at edges. Both autoconfig in and out signals on pads.
-V61 buffers weakly pulled down config-in to cpld and led. V62 buffers also config-out led.
-V64 has pull-up for config-in, can solder short to gnd to pull low.
-V65 removes buffer IC - pullup 4k7?, smd solder jumper to gnd on board
-v66 adds buffer back - about 330Kohm resistor pull-down or pull-up (solder jumper select)
-v66 adds buffers for reset, 7M clock, uds, lds, as, rw
-v67 makes buffer ics added in v66 "unused", and signals actually shorted by pcb tracks. "buf4" signals can be shorted with solder on bottom-side pads.
-v68 takes one dual buffer, schmitt-trigger for 7M and config-in
-V58 nearly the same as v59 (about 10 pcbs v58, 100 v59 manufactured)
-One config (either in or out) signal
-can have LED indicating config-signal status, and extra pull up (or down) resistor for autoconfig-input version.
JP2 Config-in/out (other pad gnd) and jtag location:
Parts: 3.3 volt 4Mx16 dram tsop-50, edo (maybe fpm too), 4k refresh with cas-before-ras refresh. (part numbers to be added LGS GM71VS65163CLT, Toshiba TC5165165AFTS-60, Samsung K4E641612E-TC60, ..)
2 Tssop (or qsop, but ssop is too wide) 74 245 buffers, 3.3 volt with 5 volt tolerant i/o, "low noise" type (not too fast slew rate. I have used SN74LVCR2245APW with series output damping resistors.)
Ferrite-bead / 0-Ohm jumper 1206 size, Regulator AP2210N-3.3, 2.2uF min. output (and input) capacitor. I've used 0603 decoupling 330nF(Y5U) (also 100nF X7R) in V59. One capacitor could be tantalum 10uF (10volt or more 0603,0805,1206 size), maybe as regulator output capacitor.
C4 gnd via sinks heat, so to solder straight, fix +3v3 side first.
V43, 42, 40
The RAM chip is 5 volt KM416C4104 TSOP-50 package (suffix maybe AS, BS, CS...) pdf
Samsung 4M x 16bit CMOS Dynamic RAM with Extended Data Out, with 4K refresh, cas-before-ras refreshing.
(FPM version KM416C4100 might work too.)
It is not very common, I got a couple by desoldering them from a 16 MByte SIMM, also 32 MB SIMMs.
V43 schematic board
LM3480 -3.3volt regulator used with 3.3volt XC9572XL TQFP-100, 10 capacitors (see pcb notes, could use also one 10uF tantalum 10V or more for dram), led with series resistor, connections to 68000 socket / 68000.
Also 5 volt xc9572 should work probably, regulator replaced with jumper.
V42 schematic board jtag pins v40 pcb brd image v40, autoconfig pinout
v40 photo v40 pcb photo Schematic v40 (png image).